Designer's Guide Consulting

The character of analog, mixed-signal, and RF designs has changed. Today's analog blocks typically have hundreds to thousands of distinct settings and modes to support tuning, calibration, test, multiple standards, special situations, reduced power states, etc. Each of these must be verified to assure the circuit is implemented correctly. Simple catastrophic errors, such as inverted signals, reversed busses, logic errors, and inappropriate dependencies, are increasingly common because these errors often remain hidden amongst the numerous modes. The only way to find them is to test every mode and setting, a seemingly impossible task when circuits are large and implement complex algorithmic behavior such as ΔΣ converters, frequency synthesizers, or switching regulators. The cost of mistakes is high. Each month the chip is delayed is lost revenue, easily reaching $500k/month and often more. Such costs justify a substantial investment to either find or prevent these errors before tape out, but when transistor-level simulations require weeks for a single setting or mode with the fastest simulators, one cannot solve this problem by simply throwing more simulators and computers at it. A new approach is needed.

The performance verification challenge is one of pushing your design tools beyond their natural capabilities. Achieving a noise floor of –120 dB when simulating a class-D audio amplifier, predicting spurious-free dynamic range of a ΔΣ converter when the simplest of simulations take more than a week, simulating the error-vector magnitude of a polar-modulating transmitter operating at 2.5 GHz that uses digital distortion correction, determining the noise and distortion characteristics of a software-defined radio that uses a sampled-data IF chain and ΔΣ offset correction, and simulating a transceiver while including the effect of parasitics, the substrate, and the package are all examples of extremely difficult performance verification challenges. Such challenges require accuracy, capacity, and capabilities seemingly well beyond those provided by conventional circuit simulators, and the new high-capacity circuit simulators trade accuracy for capacity making them unsuitable for use in verifying performance in most cases. One cannot just blindly simulate. Considerable skill and creativity is needed to perform these simulations.

Summary

Analog designers are now being overwhelmed by the complexity of their designs as their digital counterparts were in the late 1990’s.
Functional failures are now taking precedent over performance failures.
IC designs are now done by teams of teams, exacerbating the issue of functional failures as miscommunication becomes a source of error.
Traditional design methodologies that focus on performance are not adequate to handle functional verification.
Verifying the performance of complex analog and RF designs is even harder than verifying their function, and is often beyond the capability of the available tools.